Senior Staff/Staff Digital Design Engineer

In your new role you will:

Work on IP development, for SOC

• Understand the development methodologies followed and involve in completing the QA process for the IP like LINT/CDC etc.
• Work closely with the verification and validation team to ensure coverage of features and debug
• Work on innovative algorithms and methods which interfaces with analog subsystem
• Work on the signal processing and implementation of control path like motor controllers, PLL, General purpose precision signal chains .

Your Profile

Bachelors/Masters in Electronics/Electrical/VLSI Design/Microelectronics

• Hands on RTL design engineer with nearly 6-8 years of strong RTL design, Lint/CDC, integration and synthesis experience over multiple IP and SoC development projects
• Expertise in Design tools like Spyglass LINT/CDC, Synopsys and Cadence synthesis and LEC tools
• Strong knowledge in ASIC Synthesis, Timing analysis, Timing closure.
• Familiarity with multiple simulators and debugging
• Familiar with power aware design techniques, UPF etc.
• Knowledge in bus architectures APB, AHB and AXI, standard interface protocols like USB, USB PD
• Basic programming skill in Python, Tcl, Perl
• Good understanding on DSP filters and discreate control theory is a plus

Role: ASIC / RTL / Logic Design Engineer

Industry Type: Electronic Components / Semiconductors

Department: Engineering - Hardware & Networks

Employment Type: Full Time, Permanent

Role Category: Hardware

Education

UG: Any Graduate

PG: Any Postgraduate